CPU Server Physical Design Methodology, Infrastructure and Automation Engineer
Core
Build infrastructure, automation, and dashboards for next-generation CPU physical design, synthesis, place & route, and signoff flows.
Role type
Senior IC physical design infrastructure and automation engineer
Builds
Design infrastructure, dashboards, and automation tools for CPU implementation teams
Domain
Semiconductor / CPU Physical Design
Required skills
Synthesis, place and route, signoff timing/power analysis, scripting (TCL, Python, Perl, CSS, HTML, JS, CGI), data analytics, root cause analysis, AI-assisted modeling
Preferred skills
MS in EE/CS, 10 years experience, industry standard tool knowledge, visual aid creation, complex data metrics representation
Technologies
TCL, Python, Perl, CSS, HTML, JS, CGI
Responsibilities
Work with cross-functional teams to bring up design infrastructure and dashboards for multiple CPU designs; Analyze and improve optimization methods for block-level implementation teams; Develop prediction models and automation for timing, power, and area estimation
Seniority
Senior, hands-on IC
