CareerPlan

Principal CPU PPA Pathfinding Engineer

San Diego, California, United States of AmericaFull-time2026-10-13 → 2026-11-10

Core

Define competitive Power, Performance, and Area (PPA) options for future Qualcomm CPU products by analyzing architectural concepts, process technology, and physical design constraints to shape implementation strategy and roadmap choices.

Role type

Principal CPU PPA Pathfinding Engineer (IC)

Builds

CPU design options, PPA projections, and implementation strategies for future CPU generations

Domain

Semiconductor / CPU Engineering / Physical Implementation

Required skills

CPU implementation expertise, physical synthesis, floorplanning, place and route, clock tree synthesis, static timing analysis, power analysis, signoff, Python/Tcl/Perl scripting, data analysis, experiment design

Preferred skills

CPU microarchitecture knowledge, advanced process node pathfinding, industry-standard EDA tools (Cadence/Synopsys), PPA estimation modeling, power modeling, thermal constraints, pre-silicon to post-silicon correlation

Technologies

Python, Tcl, Perl, Cadence, Synopsys

Responsibilities

Lead CPU PPA pathfinding studies from concept to feasibility, define and compare PPA options across microarchitecture and process nodes, build representative implementation experiments, generate power-performance curves, evaluate constrained operating points, partner with cross-functional teams to align assumptions, drive data quality and consistent evaluation methodologies, communicate trade-offs to technical leaders, mentor engineers, and own competitive PPA analysis across market segments

Seniority

Principal, strategy & mentorship