SOC Verification Principal Engineer
Core
Define verification scope, develop test plans and infrastructure, and verify the correctness of digital/analog IP blocks and SoCs for high-performance, low-power products.
Role type
Principal ASIC Verification Engineer
Builds
IP blocks and System-on-Chip (SoC) designs
Domain
Semiconductor / ASIC Design
Required skills
System Verilog, UVM, C/C++, Verilog, AXI-AMBA protocols, UFS/Ethernet/PCIe protocols, VCS, waveform analysis, scripting (Shell/Perl/Makefile), ASIC flow knowledge
Preferred skills
IP level or SoC level prior experience, processor-based SoC verification experience
Technologies
VCS, Synopsys VIPs, UVM, System Verilog, C, C++, Shell, Perl, Makefile
Responsibilities
Understand design specifications and define verification scope; implement and analyze System Verilog assertions and coverage; develop and execute verification test cases; collaborate with architects, designers, and pre/post-silicon teams; adhere to quality standards and test practices.
Seniority
Principal, hands-on IC
