FY27 Intern - MSIP Design Methodology Engineering Internship - Canada (16 months)
Core
Building optimized tools and AI/ML solutions to enhance back-end design flow, PPA optimization, and design efficiency for semiconductor products.
Role type
Intern, Design Methodology Engineering
Builds
Optimized design flow tools and AI/ML solutions for execution teams
Domain
Semiconductor / Hardware Design
Deliverable
production ML models
Required skills
Back-end design flow, Flow scripting, AI/ML development, LLM application, Physical synthesis, Static timing verification, Physical verification (DRC/LVS/ERC), EM/IR analysis
Preferred skills
IC design tools (synthesis, simulation, STA), Scripting (TCL/Python/Perl/C++), Linux/Unix environment, ASIC/IC design flow knowledge
Technologies
LLM, EDA tools, Verilog, Python, C/C++, TCL, Perl
Responsibilities
Gain hands-on experience with the complete back-end design flow; Assist in flow scripting and benchmarking; Develop AI/ML solutions to enhance design efficiency; Leverage LLM and EDA tools for PPA optimization; Support physical synthesis with power/area trade-offs; Assist with static timing verification and closure; Conduct physical verification (DRC, LVS, ERC); Perform EM/IR analysis.
Seniority
Intern
