Systems Engineer, Staff - SoC Interconnect / NoC Systems Architecture
Core
Define and evolve System-on-Chip (SoC) interconnect and Network-on-Chip (NoC) architectures for data center, automotive, smartphone, and emerging compute platforms.
Role type
Staff Systems Engineer (SoC Interconnect/NoC Architecture)
Builds
Scalable, high-performance, and power-efficient SoC solutions
Domain
Semiconductor / SoC Design / Interconnect Architecture
Required skills
SoC architecture, NoC architecture, ARM CHI/AXI/AHB/ACE protocols, RTL development (Verilog/SystemVerilog), multi-core ARMv8/ARMv9, cache coherency, memory hierarchy, system modeling, performance analysis
Preferred skills
Large-scale SoC architecture (data center/AI/ML/mobile/automotive), PCIe/CXL knowledge, silicon validation, cross-functional technical leadership
Technologies
Verilog, SystemVerilog, ARM AMBA, PCIe, CXL, Ethernet, UALink
Responsibilities
Define system requirements and translate use cases into interconnect architecture specifications; Evaluate and recommend NoC topologies, routing algorithms, and traffic management schemes; Develop behavioral models to study NoC performance and design trade-offs; Collaborate with CPU, GPU, AI/ML, and memory teams to define interconnect requirements; Partner with RTL, verification, and physical design teams throughout the product lifecycle; Support post-silicon validation by correlating pre-silicon assumptions with measured silicon behavior.
Seniority
Staff, hands-on IC
