Synthesis- Lead /Staff Engineer
Core
Lead/Staff engineer responsible for synthesis and low power implementation bring up of power complex SoC.
Role type
Staff/Lead IC hardware synthesis engineer
Builds
Power complex SoC
Domain
Semiconductor hardware engineering (SoC, low power, multi-voltage)
Required skills
physical and power aware synthesis techniques, multi-voltage design, timing constraint analysis, pre/post layout netlist qualification, DFT scan insertion, scripting (TCL, Perl, Python, shell)
Preferred skills
design data management (Perforce, ClearCase), logical equivalence checking, timing derating, mentoring junior engineers
Technologies
SoC, MBIST, DFT, TCL, Perl, Python, shell, Perforce, ClearCase
Responsibilities
Work with design to bring out pre layout timing challenges and constraint feedback, collaborate with DFT team for MBIST and DFT scan insertion, work with Physical Design to bring out low power implementation issues and fixes, balance power, performance, area and verification priority approaches at synthesis
Seniority
Staff/Lead, hands-on IC
