Physical Design , Principal Engineer/Director, (Custom Silicon Group)
Core
Lead the development and delivery of next-generation, high-performance SoCs from concept to tapeout, serving as a key customer-facing engineering leader.
Role type
Principal/Director-level Physical Design Engineer (Custom Silicon)
Builds
High-performance System-on-Chips (SoCs) for next-generation mobile and connected devices
Domain
Semiconductor / Custom Silicon / Hardware Engineering
Required skills
Physical Design (PnR), Floor Planning, Placement, Clock Tree Synthesis (CTS), Static Timing Analysis (STA), Power Analysis, Signoff (Timing, Power, Area), Low Power Verification, Physical Verification, Deep sub-micron design expertise, Leakage power management, Signal Integrity, DFM
Preferred skills
Hands-on experience with 2nm/3nm/4nm/5nm nodes, Low Power/High Performance optimization, LEC/CLP/PDN knowledge
Technologies
Advanced technology nodes (2nm, 3nm, 4nm, 5nm), PnR flows, STA flows
Responsibilities
Lead and manage a team across multiple functions and sites; Execute design closure and tapeout in advanced technology nodes; Complete ownership of PnR implementation including floor planning, placement, CTS, and post-route activities; Collaborate to resolve issues related to constraints validation, verification, STA, Physical Design, and tapeout; Provide technical leadership during design reviews and executive-level customer engagements; Drive resolution of customer-reported issues by coordinating across design, verification, firmware, software, and validation teams.
Seniority
Principal/Director, hands-on IC with strategic leadership
