SOC Verification and Methodology Engineer -Staff
Core
Define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for high performance, high quality, low power products.
Role type
Staff ASIC Verification and Methodology Engineer
Builds
High performance, high quality, low power world class products (ASICs/SoCs)
Domain
Semiconductor / Hardware Design
Required skills
ASIC design, verification, validation, integration, architecture, circuit specifications, logic design, system simulations, RTL to GDS Flow, Virtuoso, scripting tools, programming languages, design verification methods
Preferred skills
Master's degree in Electrical/Electronic Engineering, Computer Engineering, or Computer Science, 6+ years of ASIC experience, 2+ years with architecture and design tools, 2+ years with scripting tools and programming languages, 2+ years with design verification methods, 1+ year interacting with senior leadership
Technologies
Virtuoso, RTL to GDS Flow
Responsibilities
Create advanced architectures, circuit specifications, logic designs, and/or system simulations based on system-level requirements; Collaborate across functional teams to develop and execute an implementation strategy; Evaluate all aspects of complex process flow from high-level design to synthesis, place and route, timing and power use, and verification; Write and review detailed technical documentation for complex EDA/IP/ASIC projects
Seniority
Staff, independent work with supervision of others
