Staff ASIC Verification Engineer, Low Power AI
Core
Design and verify ultra-low power AI subsystems and audio AI products for smart audio and context-aware applications.
Role type
Staff ASIC Verification Engineer (Low Power AI)
Builds
Ultra-low power SoC HW blocks with always-on IP for wireless connectivity and on-device AI
Domain
Semiconductor / VLSI / AI / Audio
Deliverable
production ML models
Required skills
SystemVerilog, UVM, Verilog, VHDL, C/C++, ASIC/VLSI concepts, RTL design, testbench creation, assertion development, functional coverage, simulation, debug, technical leadership
Preferred skills
Audio protocols (MP3, MIDI), Bus/interconnect (AHB, AXI), CPU architectures (ARM v8/v7), digital circuits, event-driven simulators, scripting (Perl, Python, tcsh, GNU Make), automotive safety (ISO26262)
Technologies
SystemVerilog, UVM, Verilog, VHDL, C, C++, Python, Perl, SystemC, AHB, AXI, ARM
Responsibilities
Contribute to core verification during pre/post silicon phases; drive test plan development and execution; create/maintain test benches and coverage models; implement automation flows; lead complex debug activities; provide technical supervision; define verification methodology with design teams
Seniority
Staff, hands-on IC with mentorship
