Lead SoC Performance Architect
Core
Create performance and power models for fabric NoC, DRAM controller, and IO blocks for server-class SoCs, correlate models against RTL behavior, and prototype ideas to productize performance/power features.
Role type
Senior IC SoC Performance Architect
Builds
Server-class System-on-Chip (SoC) designs
Domain
Semiconductor / Computer Architecture
Deliverable
production ML models | product features
Required skills
SoC performance/power modeling, Computer architecture fundamentals (interconnects, traffic QoS, distributed caches, coherency flows, DRAM controller, IO flows), C++, Perl, Python, Performance analysis and debug
Preferred skills
IP/SoC level performance validation between RTL and models, Post-silicon performance debugging, Productizing performance/power improvements
Technologies
C++, Perl, Python
Responsibilities
Conduct RTL performance verification by creating verification plans and directed tests, Develop SoC performance/power models for interconnects, caches, memory controllers, and IO controllers, Verify model correctness via unit-tests and debugging mismatches, Prototype and characterize ideas for improving SoC performance/power, Collaborate with architects and RTL developers to productize identified improvements
Seniority
Senior, hands-on IC
