CPU RTL Design - Sr Eng/Lead/Staff/Sr Staff
Core
CPU Micro-architecture and RTL Design for high performance, low power devices, working with chip architects to conceive micro-architecture and define architecture/product.
Role type
Senior IC CPU RTL Design Engineer
Builds
CPU micro-architecture specifications and RTL designs for high-performance, low-power chips
Domain
Semiconductor / Hardware Engineering / CPU Design
Required skills
CPU micro-architecture expertise, RTL design (Verilog/VHDL), logic design principles, timing and power analysis, scripting (Perl/Python)
Preferred skills
Instruction fetch/decode, branch prediction, instruction scheduling, register renaming, out-of-order execution, integer/floating point execution, load/store execution, prefetching, cache/memory subsystems, simulators, waveform debugging tools, low power techniques, high performance trade-offs
Technologies
Verilog, VHDL, Perl, Python
Responsibilities
Performance exploration with modeling team, Microarchitecture development and specification, RTL ownership and refinement, Functional verification support, Performance verification support, Design delivery and validation
Seniority
Senior, hands-on IC
