LEC CAD Engineer, Sr Lead
Core
Drive formal verification of complex hardware design blocks using advanced formal tools and automation to achieve high-confidence sign-off.
Role type
Senior IC Formal Verification Engineer
Builds
Hardware design verification flows and sign-off quality
Domain
Semiconductor / Hardware Engineering
Required skills
Formal verification fundamentals, Proof strategies, Abstraction techniques, Formal tools (Jasper, VC Formal, Questa Formal), Python scripting, Property-based verification (SVA), Low-power verification concepts
Preferred skills
Low-power methodology (UPF/CPF, power/clock gating), Advanced DV methodologies
Technologies
Jasper, VC Formal, Questa Formal, Python, SVA, UPF, CPF
Responsibilities
Drive formal verification of complex design blocks using advanced Formal Apps and robust convergence strategies, Review and refine formal setups, proofs, constraints, and abstractions with design/DV teams, Develop automation scripts to enhance efficiency and scalability of FV flows, Analyze challenging formal problems and propose effective verification strategies
Seniority
Senior, hands-on IC
