CareerPlan

MBIST Diagnostics Engineer, up to Sr. Staff

Hsinchu City, TaiwanFull-time2026-07-19 → 2026-11-10

Core

Lead the development of MBIST diagnostics, memory repair, failure analysis, and advanced memory diagnostics flows for next-generation SoCs and advanced memory architectures.

Role type

Senior IC MBIST Diagnostics Engineer (Memory Repair & Yield)

Builds

Robust memory diagnostic methodologies, repair flows, and data pipelines for SRAM, DRAM, HBM, and 3DIC memory architectures.

Domain

Semiconductor / ASIC Design / Memory Testing

Required skills

MBIST architecture, memory failure analysis, redundancy analysis (BIRA/BISR), ECC/self-repair, Python/TCL scripting, data analytics, silicon debug, yield learning, cross-functional leadership

Preferred skills

8+ years in MBIST/memory diagnostics, expertise in 3DIC/stacked memory/HBM, EDA tool experience (Siemens Tessent/Synopsys SMS), machine-learning for diagnostics

Technologies

Python, Perl, TCL, Siemens Tessent MemoryBIST, Synopsys SMS

Responsibilities

Lead SRAM MBIST diagnosis and memory failure analysis; Analyze ATE datalogs and fail signatures to isolate root causes; Architect MBIST diagnostic solutions for 3DIC and stacked memory; Develop automation frameworks and data pipelines for yield learning; Mentor engineers and drive best practices in memory diagnostics.

Seniority

Senior, hands-on IC with technical leadership