CPU Integration CAD Engineer
Core
Build and support implementation tools and flows for custom CPUs to ensure industry-leading power, performance, and area.
Role type
Senior IC CPU Integration CAD Engineer
Builds
Implementation tools and flows for floorplanning, power planning, pin placement, and PDV analysis (DRC/LVS/antenna) for custom CPUs.
Domain
Semiconductor / CPU Physical Design / EDA
Required skills
Python, Tcl, automation, PNR tools (Innovus, PDV Calibre), place-and-route, timing sign-off, advanced technology nodes (5nm or lower)
Preferred skills
High-performance chip development (design or CAD), data structures and algorithms, broad physical design tasks
Technologies
Innovus, PDV Calibre
Responsibilities
Develop, integrate, and release flows and methodologies for floorplanning or PDV analysis; Architect, maintain, and support implementation flows; Resolve project-specific issues; Work with EDA vendors to define roadmap and resolve tool issues.
Seniority
Senior, hands-on IC
