Power Architect – AI SOC
Core
Architect end-to-end Power, Performance, and Area (PPA) excellence for next-generation AI semiconductor chips, bridging front-end architecture and back-end physical design.
Role type
Senior IC Power Architect (AI SoC)
Builds
AI inference and training chips with industry-leading power efficiency
Domain
Semiconductor / AI Hardware / SoC Design
Deliverable
production ML models
Required skills
SoC architecture, low-power RTL design, Physical Design (PD) implementation, power intent (UPF/CPF), EDA tool customization, Python/Tcl/Perl scripting
Preferred skills
Experience with PowerArtist, PrimePower, Joules, multi-voltage domain structures
Technologies
UPF, CPF, PowerArtist, PrimePower, Joules, Python, Tcl, Perl
Responsibilities
Drive SoC-level power and thermal management architecture; Review and guide RTL implementation for power/timing goals; Develop and fine-tune Physical Design recipes for PPA targets; Partner with EDA vendors to customize power analysis tools; Lead PPA analysis and trade-off discussions across teams.
Seniority
Senior, hands-on IC
