Interconnect Model Development/Support CAD Staff Engineer/Senior Engineer
Core
Develop new flows and methodologies for extracting and releasing interconnect models used by EDA tools to predict electrical behavior of designed circuits.
Role type
Senior IC CAD engineer (interconnect modeling)
Builds
Interconnect models and parasitic extraction flows for EDA tools
Domain
Semiconductor manufacturing / EDA tools
Required skills
Layout parasitic extraction tools, Python programming, Cadence SKILL, Semiconductor process technology, Schematic and layout design tools (via careerplan.io/jobs/41996045-interconnect-model-developmentsupport-cad-staff-engineersenior-engineer-at-micron)
Preferred skills
Perl, C/C++, Agentic AI
Technologies
Synopsys StarRC, Cadence SKILL, Python, Perl, C/C++
Responsibilities
Build and release interconnect models based on process technology information; Develop new flows and methodologies for parasitic extraction from layout; Design test structures (TEGs) for calibrating interconnect models; Debug and troubleshoot EDA vendor tool issues; Support Micron users of parasitic extraction tools and flows
Seniority
Senior, hands-on IC
