CareerPlan

SMTS Process Engineer RDA /Metrology

Boise, Idaho, United States of AmericaFull-time2026-04-21 → 2026-10-23

Core

Lead the development and scale-up of chip-to-wafer and hybrid bonding processes for high-performance 3D memory products like HBM and 3DS DRAM.

Role type

Senior Process Engineering Technical Leader (Advanced Packaging)

Builds

High-volume manufacturing processes for 3D memory

Domain

Semiconductor / Advanced Packaging

Required skills

Chip-to-wafer bonding, Hybrid bonding, Process flow development, Materials integration, Wafer fab process knowledge, Die processing, Thinning, Downstream packaging interactions, Multi-team technical leadership, Technology transfer

Preferred skills

FOAK process development, Equipment and materials supplier collaboration, Mentoring and methodology development, Patents or publications, Solder reflow, TCB (Thermo-Compression Bonding)

Technologies

Solder reflow, TCB, Hybrid bonding

Responsibilities

Set technical direction for bonding processes, Develop and mature process flows and materials, Lead problem solving across wafer fab and packaging, Partner with integration and manufacturing teams, Drive technology transfer to manufacturing

Seniority

Senior, hands-on IC with technical leadership