Hardware/ Software Co-Design Engineer
Core
Designing micro-architecture and RTL implementation of low-power digital signal processors, hardware accelerators, and system-on-chip components for high-bandwidth brain-machine interfaces.
Role type
Senior IC hardware/software co-design engineer
Builds
Low-power DSPs, hardware accelerators, GPUs, and radio/serial link MAC/PHYs for neural recording and stimulation SoCs
Domain
Semiconductor / Brain-Computer Interfaces
Deliverable
production ML models
Required skills
Micro-architecture design, RTL implementation, Embedded C/Rust, SystemVerilog, C/C++, Python, Emulation modeling, Digital system architecture, DSP pipeline design
Preferred skills
Architecture optimization with process technology, Digital system verification, Physical design, SoC debugging, Functional modeling, Tool flow automation, ISA design, Compiler back-end design
Technologies
SystemVerilog, C, C++, Python, Rust, SystemC
Responsibilities
Design low-power DSPs and hardware accelerators; Optimize hardware/software interfaces with firmware; Perform energy/performance profiling and workload analysis; Collaborate on silicon bring-up tests
Seniority
Senior, hands-on IC
