Hardware/ Software Co-Design Engineer
Core
Designing micro-architecture and RTL for low-power DSPs, hardware accelerators, and SoCs for high-bandwidth brain-machine interfaces.
Role type
Senior IC hardware/software co-design engineer
Builds
Low-power digital signal processors, general-purpose hardware accelerators, GPUs, and radio/serial link MAC/PHYs for brain-computer interfaces
Domain
Semiconductor hardware design for neural recording and stimulation systems
Deliverable
production ML models | product features
Required skills
Micro-architecture design, RTL implementation, embedded software (C/Rust), SystemVerilog, C/C++, Python, emulation modeling, digital system architecture, DSP pipeline design
Preferred skills
Architecture optimization with process technology, digital system verification, physical design, SoC debugging, functional modeling, tool flow automation, ISA design, compiler back-end design
Technologies
SystemVerilog, C, C++, Python, Rust, SystemC
Responsibilities
Design and optimize hardware/software interfaces with firmware engineers; perform complex system modeling for energy and performance benchmarks; conduct workload analysis and energy/performance profiling; collaborate on silicon bring-up tests with verification engineers
Seniority
Senior, hands-on IC