Senior Fpga Verification Engineer
Core
Architecting, developing, and executing test benches to verify ASIC/FPGA functionality and requirements for avionics systems.
Role type
Senior IC FPGA/ASIC verification engineer
Builds
Verified ASIC/FPGA designs and test environments for avionics products
Domain
Avionics, Digital IC Design
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work -> product features (verified designs)
Required skills
SystemVerilog UVM, COCOTB, Python scripting, VHDL/Verilog/SystemVerilog coding, QuestaSim/VCS/Riviero-Pro/Verilator simulation, coverage metric collection, test plan definition, hardware-in-the-loop testing
Preferred skills
ASIC/FPGA design, digital circuit design, constrained random testbenches, assertion-based simulations, DSP-centric design validation, back-annotated simulation
Technologies
SystemVerilog, UVM, COCOTB, Python, QuestaSim, VCS, Riviero-Pro, Verilator, VHDL, Verilog
Responsibilities
Architect and generate ASIC/FPGA test benches; Generate test cases and run simulations; Perform testing on target hardware (HIL); Collect functional and code coverage metrics; Validate and verify requirements; Debug design and test issues; Prepare materials for peer reviews
Seniority
Senior, hands-on IC