Senior Staff Engineer, Design Verification
Core
Develop and maintain UVM testbench components and verification environments for complex SoC architectures to ensure design quality.
Role type
Senior Staff IC design verification engineer (SoC)
Builds
Custom silicon solutions for high-performance compute, server, network processing, and storage applications
Domain
Semiconductor / Custom Silicon / SoC Design
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
UVM, SystemVerilog, Verilog, C/C++, Python, Perl, Linux
Preferred skills
None stated
Technologies
CXL, PCIE, Ethernet, ARM CPU cores
Responsibilities
Analyze architectures and designs to create comprehensive test plans and strategies; Contribute to the development of verification environments; Develop tests and testing strategies to achieve coverage goals; Debug failures and work with designers to resolve issues
Seniority
Senior Staff, hands-on IC
