Senior Staff Analog and Mixed Signal Engineer
Core
Develop and implement mixed-signal verification (DV) plans and testbenches for broadband analog amplifiers (TIAs, EAMs, MZMs) supporting 10Gbps to 1.6Tbps systems.
Role type
Senior Staff IC mixed-signal verification engineer
Builds
Physical layer ICs for high-speed fiber optic data communication
Domain
Semiconductor / Data Center / High-Speed Analog
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Mixed-signal circuit design and verification, Transistor-level modeling, Control/Feedback loop stability analysis, AGC loop design, High-precision analog circuits (linear regulators, current sensors, bandgaps, DAC, ADC), RF/High-Speed broadband techniques, EDA CAD tools (Cadence Virtuoso/Sim-vision, Synopsys Custom Compiler), Python, Verilog/Verilog-A/SystemVerilog
Preferred skills
SiGe BiCMOS technology experience
Technologies
SiGe BiCMOS, CMOS, Cadence Virtuoso, Sim-vision, Synopsys Custom Compiler, Python, Verilog, SystemVerilog
Responsibilities
Design and develop verification testbenches using industry-standard languages, Write and execute test cases to verify functionality and performance, Review and analyze verification results to provide feedback to design teams, Collaborate with design and layout teams to resolve design issues, Maintain detailed documentation of verification plans and results
Seniority
Senior Staff, hands-on IC