Staff CAD Engineer (Power Signal Integrity)
Core
Develop and maintain Power Signal Integrity (PSI) signoff methodology, flows, and automation for block-level and full-chip static/dynamic IR/EM analysis across Marvell's semiconductor products.
Role type
Staff IC Power Signal Integrity Engineer
Builds
Production ASIC/SoC design flows for Data Center, Networking, Automotive, and Storage markets
Domain
Semiconductor / VLSI Design / Power Integrity
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Cadence Voltus, static IR/EM analysis, dynamic IR analysis, hierarchical power analysis, DC/AC-EM analysis, package-aware simulation, automation scripting (Tcl, Python), tapeout support
Preferred skills
thermal flows, multi-die IR/EM analysis
Technologies
Cadence Voltus, VCD, FSDB, Tcl, Python
Responsibilities
Develop and tune static/dynamic IR/EM analysis flows for block and full-chip levels; Interface with EDA vendors to evaluate tools and drive improvements; Develop automation scripts to streamline flow execution and reporting; Support tapeout activities to ensure IR/EM signoff closure; Contribute to documentation and training of CAD flows.
Seniority
Staff, hands-on IC
