Digital Logic + Design Verification Graduate Co-Op Program (US - Fall 2026)
Core
Graduate co-op role developing next-generation semiconductor technologies for high-performance chips in AI data centers and enterprise applications.
Role type
Digital Logic & Design Verification Graduate Co-Op
Builds
High-performance ASICs/SoCs for AI data centers and enterprise applications
Domain
Semiconductor / Digital IC Design / SoC Architecture
Deliverable
production ML models | product features
Required skills
Digital logic design, Computer architecture, HDL (Verilog/SystemVerilog), RTL design, Simulation, Verification methodologies
Preferred skills
UVM, Formal verification, FPGA projects, Scripting (Python/Perl/TCL), SoC design concepts, High-speed interfaces (PCIe/DDR)
Technologies
Verilog, SystemVerilog, UVM, Python, Perl, TCL, Shell
Responsibilities
Contribute to RTL design and implementation of digital logic blocks, Develop and execute verification test plans, Build simulation environments and testbenches, Debug simulation failures and analyze coverage, Collaborate with cross-functional engineering teams, Automate workflows and analyze data
Seniority
Graduate Co-op (Master's/PhD student)
