DSP Architect
Core
Design and develop high-speed, low-power electrical and optical transceivers using PAM4 and advanced modulation schemes with FEC for AI, cloud, enterprise, and 5G infrastructure.
Role type
Senior IC DSP Architect
Builds
High-bandwidth interconnects for modern data centers
Domain
Semiconductor / Data Center Connectivity / Optical Communications
Deliverable
production ML models | product features
Required skills
Digital Signal Processing, Digital Communications, Information Theory, Coding Theory, Probability Theory, C++, MATLAB, Python, FFE/DFE, adaptive filters, Clock and Data Recovery (CDR), forward error correction, Maximum likelihood sequence detection
Preferred skills
Signal integrity, ADC based wireline transceiver, direct-detect/intensity modulated or coherent optical communication
Technologies
C++, MATLAB, Python
Responsibilities
Architect and simulate advanced DSP systems; define key features, performance targets, and detailed specifications; conduct research in digital signal processing techniques for high-speed SerDes and optical communication channels; prototype innovative algorithms for equalization, adaptation, and forward error correction; develop and validate new DSP algorithms in simulation environments; build bit-true models of DSP architectures and collaborate with design and verification teams; participate in chip bring-up activities and debug system behavior in lab environments
Seniority
Senior, hands-on IC