Analog Layout Manager
Core
Lead a team of analog layout designers to deliver macro-level layouts for advanced process technologies, ensuring schedule adherence and technical quality from planning to tape-out.
Role type
Senior Analog Layout Manager (IC)
Builds
Analog macro layouts for semiconductor IP used in data infrastructure, storage, security, and networking.
Domain
Semiconductor / Analog IC Design
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Analog layout design methodology, LVS/DRC debugging, Calibre report interpretation, team leadership, project risk assessment, cross-functional synchronization
Preferred skills
FinFET process technology, Skill/TCL/Perl programming
Technologies
Synopsys, Cadence, Calibre
Responsibilities
Lead full-time and contract layout designers, assess schedules and floor plans for analog macros, perform hands-on macro-level layout work, manage layout schedules and hire designers, identify and prioritize project risks, synchronize layout schedules with CAD and circuit design teams
Seniority
Senior, hands-on IC with management responsibilities
