SoC / RTL Low-Power Expert
Core
Final technical authority for power behavior across the full silicon lifecycle, owning power architecture, RTL power intent, estimation, correlation, and sign-off.
Role type
Senior IC SoC/RTL Low-Power Expert
Builds
SoCs for large AI, cloud data center, and telecom customers
Domain
Semiconductor / SoC Design / Low-Power
Deliverable
production ML models | product features | infrastructure
Required skills
SoC/RTL low-power design, power closure on large designs, predicting power behavior, resolving conflicting power data, technical authority across architecture/RTL/verification/physical design
Preferred skills
None stated
Technologies
RTL, UPF, PnR, gate-level, EM/IR
Responsibilities
Own SoC and subsystem power architecture and power tradeoffs, Lead and enforce low-power RTL design practices, Drive RTL and early power estimation with realistic workload assumptions, Own power correlation across RTL, gate, and post-PnR stages, Serve as final escalation point for power issues, Make and defend power sign-off and tape-out decisions, Supervise or mentor other digital design engineers
Seniority
Senior, hands-on IC
