Analog Layout Staff Engineer
Core
Create physical layouts for high-speed and precision analog circuits, ensuring designs meet specifications through simulation and verification.
Role type
Staff Analog Layout Engineer
Builds
Analog IP blocks, functional blocks, macros, and full interfaces/chips for Central Engineering business group
Domain
Semiconductor, Analog IC Design
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Electrical engineering fundamentals, Cadence Virtuoso, high-speed analog circuit design, precision analog circuit design, multi-node process experience, full development cycle ownership (floorplan to delivery), macro-level design ownership
Preferred skills
Experience with global team collaboration, technical mentorship
Technologies
Cadence Virtuoso
Responsibilities
Run simulations and verifications to refine and debug designs, collaborate with designers to meet specifications, present technical issues and solutions to global teams, mentor team members
Seniority
Staff, hands-on IC with mentorship responsibilities
