CareerPlanGet AI match score →

Lead Analog Design Engineer (Principal)

Santa Clara, CA💼 Full-time💰 $174,530–$261,400🗓 2026-05-29 → 2026-07-30

Core

Lead mixed-signal analog design for high-speed SerDes links and electrical/optical wireline transceivers for AI-driven datacenter connectivity.

Role type

Principal Analog Design Engineer (Mixed Signal)

Builds

Advanced electrical/optical serial links and mixed-signal IPs for datacenter connectivity

Domain

Semiconductor, High-Speed SerDes, Data Center

Deliverable

production ML models | product features | infrastructure

Required skills

Deep sub-micron CMOS design, Analog circuit design (ADC/DAC, PLL, DLL, CTLE, CDR, SerDes), SPICE/Spectre/MATLAB simulation, Analog layout supervision, System architecture collaboration, Full-cycle IP development

Preferred skills

Research and development of bleeding-edge technology circuits

Technologies

SPICE, Spectre, MATLAB

Responsibilities

Architectural investigation and implementation of circuits (PLL, DLL, ADC, CTLE, regulators, amplifiers, TX, RX, CDRs), Design verification using industry standard tools, Collaboration with system architects and global design teams, Hands-on design of circuits for advanced wireline links

Seniority

Principal, hands-on IC

Sourced via workday · Listed on CareerPlan, which tracks 70,000+ jobs from 20+ sources.
Apply on Workday ↗