Staff Analog IC Design Engineer
Core
Architect, specify, and implement PLL and subsystems for low-power, high-speed mixed-signal ICs used in automotive Ethernet and SerDes applications.
Role type
Staff Analog IC Design Engineer (PLL specialist)
Builds
High-speed communication chips for automotive applications
Domain
Automotive electronics, high-speed mixed-signal IC design
Deliverable
production ML models | product features
Required skills
PLL design (integer and fractional-N), VCO design, loop design optimization, analog block design, mixed-signal SoC integration, silicon validation, test development, device physics application
Preferred skills
Automotive SerDes/Ethernet link budget analysis, IP integration, scripting languages, digital design
Technologies
Matlab, Verilog A, spectrum analyzers, oscilloscopes, signal generators
Responsibilities
Participate in feasibility studies and architecture definitions; generate specifications and verification plans for analog blocks; develop analog models; design low-power high-speed analog systems; integrate blocks into SoC; perform top-level simulations; conduct silicon evaluation; support production test development; contribute to design methodology improvements
Seniority
Staff, hands-on IC design with architectural leadership
