Staff ASIC Verification Engineer
Core
Ensure functional correctness, robustness, and quality of cutting-edge semiconductor and SoC designs through comprehensive verification planning, testbench development, and coverage closure.
Role type
Staff ASIC/SoC Verification Engineer
Builds
Production SoC designs and IP blocks
Domain
Semiconductor / Hardware Verification
Deliverable
production ML models | product features
Required skills
SystemVerilog, UVM, OVM, constraint random verification, test planning, coverage-driven verification, scripting (Python/Perl/Shell), ARM SoC architectures, AMBA protocols (AXI/AHB/APB), low-power verification (UPF), formal verification, debug, timing verification, reusable testbench architecture
Preferred skills
AI/ML techniques for verification (intelligent stimulus generation, failure triage, coverage optimization), knowledge of formal verification techniques
Technologies
SystemVerilog, UVM, OVM, Python, Perl, Tcl, Verilog PLI, UPF, CPF, AXI, AHB, APB, I2C, SPI
Responsibilities
Develop and execute comprehensive verification plans; Create and enhance testbenches using SystemVerilog (OVM/UVM) and implement reusable VIP components; Apply ASIC verification techniques including directed/random stimulus generation and assertions; Collaborate with internal teams and external customers on verification strategies and results.
Seniority
Staff, hands-on IC
