Senior Design Verification Engineer
Core
Develop IP for next generation Automotive, Industrial & Medical products, including complex mix-signal IPs and analog blocks like DACs, ADCs, PLL, and wireless interfaces.
Role type
Senior Digital IC Verification Engineer
Builds
IP blocks and top-level SoCs for Automotive, Industrial, and Medical applications
Domain
Semiconductor / Mixed-Signal IC Design
Deliverable
production ML models | product features
Required skills
System Verilog, UVM, verification strategy definition, RTL debugging, functional coverage, constrained random driven verification, assertion based verification, regression management
Preferred skills
Project/task leadership, signal processing component verification, 3rd party verification IP deployment, Python, Tcl, embedded software
Technologies
System Verilog, UVM, Python, Tcl
Responsibilities
Define verification strategy and detailed verification plans for blocks and systems; Coordinate/lead verification activities in project teams; Develop System Verilog/UVM environments for blocks and top-level SoCs; Debug functional errors in RTL; Participate in verification methodology improvement activities
Seniority
Senior, hands-on IC
