Senior Staff Physical Design Engineer
Core
Physical design and methodology for next-generation high-performance processor chips in leading-edge CMOS process technology for server, 5G/6G, and networking applications.
Role type
Senior Staff Physical Design Engineer
Builds
Custom Processor/ASIC solutions and data infrastructure IP
Domain
Semiconductor, Server, 5G/6G, Networking
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Full-chip & sub-hierarchy integration, RTL to GDS flows, Static Timing Analysis, Multi-voltage design, Place and route, Physical verification, Scripting (Shell, Python, TCL), Digital logic, Computer architecture
Preferred skills
Low-power design techniques, GIT
Technologies
EDA tools, Linux shells, GIT
Responsibilities
Work with design teams across Digital/RTL/Analog disciplines to ensure design convergence, Implement/support designs with multi-voltage designs through all aspects of implementation, Write scripts to extract data and achieve productivity enhancements through automation, Provide technical direction, coaching, and mentoring to junior employees
Seniority
Senior Staff, hands-on IC with mentoring responsibilities
