CareerPlan

Packaging Engineering Intern

Dallas, TX, United StatesInternship2026-09-02 → 2026-11-09
No visa sponsorship

Core

Design, development, and analysis of semiconductor packaging technologies for TI's analog and embedded processing products.

Role type

Packaging Engineering Intern

Builds

Internal and external solutions for semiconductor packaging technologies including Wirebond, Flip Chip, Modules, SIPs

Domain

Semiconductor manufacturing / Packaging engineering

Required skills

Semiconductor packaging knowledge, material characterization, mechanical characterization, thermal characterization, electrical characterization, process knowledge, assembly knowledge, reliability analysis

Preferred skills

Semiconductor packaging knowledge (processes, assembly, reliability, materials, characterization, FA), analytical skills, problem solving skills

Technologies

Wirebond, Flip Chip, Modules, SIPs

Responsibilities

Participate in cross-functional teams to develop packaging solutions, conduct material/mechanical/thermal/electrical characterization, support design and development of advanced packages

Seniority

Intern