CareerPlan

NPU Architect

Dresden, DE (primary site) / Austin, TXFull-time2025-10-14 → 2026-11-10

Core

Design the next iteration of a 3D in-memory compute chip for executing ML workloads using capacitive analog in-memory matrix-vector multiplication units.

Role type

NPU Architect

Builds

3D in-memory compute chips for ML workloads

Domain

Semiconductor hardware / AI/ML

Deliverable

production ML models

Required skills

Computer architecture, Digital design, Micro-architecture, AI/ML algorithms, C/C++, Python

Preferred skills

ML Hardware Exploration Frameworks (Timeloop, ZigZag), HDLs (Verilog, System Verilog)

Technologies

Timeloop, ZigZag, Verilog, System Verilog

Responsibilities

Design and specify core architecture modules aligned with workload requirements; Partner with software teams to evaluate performance and efficiency; Monitor emerging trends in AI workloads and hardware architectures.

Seniority

Mid-Senior, hands-on IC