芯片设计工程师
Core
Design, implement, and optimize digital chips, supporting verification and backend teams.
Role type
Senior IC digital chip design engineer
Builds
Production digital chips (high-speed interfaces, network algorithms, CPU subsystems)
Domain
Semiconductor / Digital IC Design
Required skills
Verilog, SystemVerilog, OVL/Assertion, Tcl/Perl/Shell/Python scripting, digital frontend design flow, synthesis, static timing analysis (STA), DFT, PCIe, DDR, MAC, high-speed DMA, network lookup algorithms, QoS algorithms, cache management, ARM/RISC-V architectures, multi-core on-chip interconnects, cache/memory subsystems
Preferred skills
PCIe virtualization, high-speed network algorithms, large-scale queue management
Technologies
Verilog, SystemVerilog, OVL, Assertion, Tcl, Perl, Shell, Python, PCIe, DDR, MAC, ARM, RISC-V
Responsibilities
Perform detailed design, implementation, and synthesis of chips; Analyze and optimize chip performance; Support verification teams in planning and executing UT/IT/ST verification plans, coverage collection, and prototype issue localization; Support backend teams in floorplan and netlist delivery quality control.
