芯片设计工程师(北京/上海/深圳)
Core
Design and implement SoC/IP systems and subsystems, focusing on module architecture, RTL implementation, timing analysis, and PPA optimization.
Role type
IC chip design engineer
Builds
SoC and IP systems
Domain
Semiconductor / Digital IC Design
Required skills
RTL design (Verilog/VHDL), digital circuit design, ASIC/FPGA design flow, EDA tools (Cadence/Synopsys), C/C++/Python programming, processor architecture, memory design, bus interface design
Preferred skills
System integration, performance analysis, verification planning, coverage analysis, chip debugging
Technologies
Verilog, VHDL, C, C++, Python, Cadence, Synopsys, Mentor Graphics
Responsibilities
Design and implement SoC/IP systems and subsystems; Perform module architecture design, RTL implementation, timing analysis, and PPA optimization; Support SoC/IP system integration and documentation; Collaborate with performance teams to improve chip performance; Work with verification teams on test plans, coverage analysis, simulation, and debugging
Seniority
Mid-level IC engineer
