Staff Digital Design Engineer (资深/高级数字前端工程师)
Core
Design and verify digital logic within mixed-signal ICs, handling backend tasks like synthesis, timing closure, and DFT for new product development.
Role type
Staff Digital Design Engineer (ASIC)
Builds
Mixed-signal integrated circuits for automotive, industrial, infrastructure, and IoT applications
Domain
Semiconductor / Analog & Digital IC Design
Required skills
RTL design (Verilog/System Verilog), logic synthesis, formal verification, timing closure, DFT, mixed-signal IC design, chip debugging, failure analysis
Preferred skills
Embedded processor knowledge, transistor-level schematic design, analog device modeling, industry-standard interface design (I2C/I3C), embedded memory handling (SRAM, OTP, Flash), front-end design flow (Simulation, STA)
Technologies
Verilog, System Verilog, I2C, I3C, SRAM, OTP, Flash
Responsibilities
Perform backend digital design including logic synthesis and timing closure; Support system and product teams with chip debugging and failure analysis; Collaborate with analog/digital ASIC design teams on new product development
Seniority
Senior, hands-on IC
