ASIC Engineering Analog Design Leader | high-speed optical transceiver circuits (modulator drivers, TIAs, CDRs, PLLs, ADC/DAC) | 10+ years
Core
Lead full-chip electrical specifications and mixed-signal design for Cisco's next-generation silicon photonics driver integrated circuits supporting 100G/200G/400G per Lambda solutions.
Role type
Senior IC analog/mixed-signal design leader (silicon photonics)
Builds
High-speed optical transceivers and Co-packaged Optics (CPO) for data center networking
Domain
Semiconductor / Silicon Photonics / High-Speed Optical Communications
Required skills
high-speed optical transceiver design, mixed-signal circuit design, silicon photonics driver ICs, full-chip electrical specifications, yield enhancement, failure analysis, design for testability (DFT), Python or C scripting
Preferred skills
SerDes 112Gbps/224Gbps PAM4, Ethernet, UCIE, clock and data recovery systems, Verilog-A modeling, lab instrumentation (digital communication analyzers, BERTs), MSA standards (QSFP/QSFP-DD), IEEE 802.3 specifications
Technologies
Cadence Virtuoso, Spectre, Caliber, SystemVerilog, Verilog-AMS
Responsibilities
Lead full-chip electrical specifications, circuit design, and verification test plans from concept through production; Author mixed-signal datapath designs including photonics modulator drivers, serializers, PLLs, TIAs and control circuits; Debug complex silicon and system-level issues during bring-up and lab validation phases; Mentor and guide analog, digital, and validation engineers
Seniority
Senior, hands-on IC with leadership
