CareerPlan

ASIC Engineer - Block Level Physical Design Engineer - Armenia - ETR

ArmeniaFull-time2026-10-27 → 2026-11-10

Core

Develop automation and productivity scripts to streamline the ASIC design cycle and contribute to full-chip DFT solutions.

Role type

Junior ASIC Engineer (DFT/Scripting)

Builds

ASIC chips for Cisco Switching, Routing, and Wireless products

Domain

Semiconductor / VLSI / ASIC Design

Required skills

Python, PERL, TCL scripting, digital logic fundamentals, computer architecture, MOS devices, semiconductor physics, RTL, synthesis, scan insertion

Preferred skills

EDA tools, SoC interconnects, clock/reset/power domain knowledge, analytical problem-solving

Technologies

Python, PERL, TCL, RTL, Synthesis, Scan, JTAG, ATPG

Responsibilities

Develop automation scripts to improve engineering efficiency, collaborate on DFT solutions, learn RTL and synthesis flows, implement test implementations in SoC partitions

Seniority

Junior, academic entry-level