ASIC Design Engineer | Simulation & Emulation , Test methodologies | 7 to 11 Years | Bangalore
Core
Develop and execute verification strategies for complex ASIC designs using emulation platforms to accelerate cycles and improve coverage.
Role type
Senior IC ASIC Design Verification Engineer (Simulation & Emulation)
Builds
Networking hardware ASICs for Cisco core Switching, Routing, and Wireless products
Domain
Semiconductor / Networking
Required skills
UVM, OVM, Emulation tools (Cadence Palladium, Synopsys zebu), Test Methodologies, Networking protocols (Ethernet, AXI, AMBA, PCIe), Debugging
Preferred skills
Post Silicon functional validation, Mentorship
Technologies
Cadence Palladium, Synopsys zebu, UVM, OVM
Responsibilities
Develop verification plans and test benches using emulation tools; Collaborate with design teams to define verification requirements; Run large-scale verification tests and debug design issues; Analyze results and resolve bugs; Maintain verification infrastructure and automation frameworks; Document verification processes and results.
Seniority
Senior, hands-on IC
