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ASIC Engineering Technical Leader - CDC

3 Locations💼 Full-time💰 $183,800–$183,800🗓 2026-06-26 → 2026-09-26

Core

Lead Clock Domain Crossing (CDC) and Reset Domain Crossing (RDC) methodology for ASIC subsystems in Cisco's Silicon One chips, ensuring robust RTL design and verification for high-volume deployment.

Role type

Senior IC ASIC Engineering Technical Leader (CDC/RDC)

Builds

ASIC subsystems for Cisco core Switching, Routing, and Wireless products

Domain

Semiconductor / Hardware Design

Deliverable

production ML models | product features

Required skills

RTL development, CDC/RDC concepts, CDC/RDC flow maintenance, static glitch hazard analysis, synthesis optimized gate netlist analysis

Preferred skills

SDC constraints development, VCS simulation SVA (SystemVerilog Assertions)

Technologies

RTL, VCS, SVA, SDC, Synthesis tools

Responsibilities

Define and design CDC/RDC methodology; Design and implement reusable RTL with CDC/RDC considerations; Spec comprehensive CDC/RDC check flows; Review and approve CDC/RDC constraints and waivers; Perform static glitch analysis; Improve design to prevent static glitch hazards

Seniority

Senior, hands-on IC

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