Senior Hardware Engineer - SoC Electrical Failure Analysis (Hybrid)
Core
Lead electrical failure analysis and post-silicon validation for complex SoCs to ensure product reliability and performance in high-speed networking devices.
Role type
Senior Hardware Engineer (SoC Electrical Failure Analysis & Post-Silicon Validation)
Builds
Cisco Silicon One ASICs for switching, routing, and wireless products
Domain
Networking hardware, SoC design, electrical engineering
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
SoC failure analysis, electrical post-silicon validation, power and signal integrity, high-speed mixed-signal design, DFT, SRAM design/integration, oscilloscope/VNA/BERT/logic analyzer usage, Python/C++ for test software, system-level behavior validation
Preferred skills
Complex SoC bring-up, high-speed physical interfaces, physical/logic design, memory design/MBIST, schematic/layout expertise, networking protocols
Technologies
Python, C++, Oscilloscopes, VNAs, BERTs, Logic Analyzers
Responsibilities
Lead failure analysis efforts to determine root causes and corrective actions, define and refine post-silicon validation plans, capture and analyze device performance metrics (waveforms, eye diagrams, jitter, BER, PDN, power stability), validate system behavior under real-world workloads, contribute to chip screening test and observability software libraries
Seniority
Senior, hands-on IC
