ASIC Verification Engineer - 5 to 13 years - Bangalore
Core
Define, design, and verify ASIC and ASIC subsystems for Cisco platforms, focusing on power, performance, and area goals.
Role type
Senior ASIC Verification Engineer
Builds
High-volume, high-quality ASIC subsystems deployed in Cisco platforms
Domain
Semiconductor / ASIC Design / Mixed-Signal
Deliverable
production ML models | product features | infrastructure
Required skills
ASIC design and verification, architecture definition, debugging at ASIC/SW/HW levels, reusable code development, verification methodology definition, analog/mixed-signal testing, EDA flow deployment, physical design of complex blocks, power and signaling solutions
Preferred skills
Experience with analog/mixed signal products, platform-level code reviews, lab bring-up
Technologies
PD EDA flows, mixed-signal design tools
Responsibilities
Drive definition, architecture, and design of high-performance ASICs; Own complex or multiple functional areas; Develop reusable code for future projects; Debug at ASIC, SW, HW level; Leads design work by solving block level issues; Defines new verification methodologies; Responsible for testing high accuracy analog designs; Develops and deploys PD EDA flows; Owns physical design of highly complex blocks; Identifies, designs and implements power and signaling solutions
Seniority
Senior, hands-on IC
