CareerPlan

Design Verification Engineer

Cupertino, United States of AmericaFull-time$174k–$225k2026-11-05 → 2026-11-10

Core

Verify complex digital IPs by building verification plans, test benches, and test cases to ensure functional and code coverage for blocks.

Role type

Design Verification Engineer

Builds

Digital IP blocks and chips

Domain

Semiconductor / Digital Hardware Design

Required skills

System Verilog, UVM, Verilog, VHDL, C, Python, Perl, Finite State Machine design, Digital Hardware Simulation, CAD software debugging

Responsibilities

Create block level verification elements using formal verification and UVM; Develop drivers, tests, reference models, and checkers; Debug test failures and collaborate with designers on fixes; Use functional and code coverage to track progress and gauge tape out readiness; Participate in code reviews of other blocks; Collaborate on developing precise design specifications for digital control blocks.