SOC Design Verification Engineer
Core
Pre-silicon RTL verification for wireless System-on-Chip (SOC) blocks, subsystems, and top-level integration, focusing on WiFi/Bluetooth, power management, and low-power design intent.
Role type
Senior IC design verification engineer (wireless SOC)
Builds
Wireless silicon chips for Apple devices (iPhone successors)
Domain
Semiconductor / Wireless Connectivity / VLSI
Required skills
SystemVerilog, Verilog, UVM, constrained-random verification, coverage closure, digital logic design, SOC architecture, UPF, formal verification, Python scripting
Preferred skills
PCIe/AXI/NOC verification, WiFi/Bluetooth protocol knowledge, embedded CPU verification (C/C++/Assembly), AI-assisted verification techniques, SVA
Technologies
UVM, SystemVerilog, Verilog, UPF, JasperGold, Python, Perl
Responsibilities
Develop reusable UVM testbenches for blocks and subsystems; write directed and constrained-random tests; debug corner cases and manage bug tracking; verify low-power design intent using UPF; verify end-to-end WiFi/Bluetooth traffic flows; apply formal verification; build automated regression flows.
Seniority
Senior, hands-on IC
