Mixed Signal Verification Engineer
Core
Design Verification Engineer responsible for verifying functionality and performance of analog/RF blocks within large System-on-Chip (SoC) designs.
Role type
Mixed Signal Verification Engineer
Builds
Analog/RF blocks (regulators, bandgaps, data converters, LNAs, PAs, mixers, PLLs) inside large SoCs
Domain
Semiconductor hardware design, Analog/RF circuits, System-on-Chip (SoC)
Required skills
RNM coding in SystemVerilog, analog/RF circuit theory, self-checking model development, assertion creation, AMS environment setup, mixed signal/RF block modeling, high frequency PLL modeling
Preferred skills
MS degree, 3+ years industry experience, Cadence mixed signal verification environment, reading analog schematics, modeling biasing networks, power regulators, Opamps, OTAs, data converters, couplers, splitters, combiners
