Digital/Mixed Signal Modeling/Verification Engineer
Core
Design Verification Engineer responsible for modeling and verifying analog/RF blocks within large System-on-Chip (SoC) architectures.
Role type
Senior IC mixed-signal verification engineer
Builds
Large-scale SoCs containing advanced analog/RF components
Domain
Semiconductor hardware design, analog/RF circuitry
Required skills
RNM coding in SystemVerilog, analog/RF circuit theory, self-checking model development, assertion creation, AMS simulation environment setup, digital-on-top testbench debugging
Preferred skills
Cadence mixed signal verification environment, analog schematic reading, high-frequency PLL modeling, biasing networks, power regulators, data converters, LNA/PA, mixers
Technologies
SystemVerilog, RNM, Cadence, AMS
Responsibilities
Develop RNM RF/Analog models with self-checking techniques; assess model accuracy based on verification goals; create assertions for analog/digital specs; set up AMS simulation environments with analog designers; debug complex chip digital-on-top testbenches
Seniority
Senior, hands-on IC