ASIC Design Engineer — IP Integration & Implementation
Core
Designing high-performance, low-power pixel processing engines and multimedia IP subsystems for Apple's next-generation SoCs.
Role type
Senior IC ASIC Design Engineer (Pixel IP)
Builds
High-performance pixel processing engines and multimedia IP for Apple devices
Domain
Consumer electronics / Semiconductor / Image processing
Required skills
RTL design, micro-architectural specification, digital hardware design, timing optimization, power optimization, formal verification, cross-functional collaboration
Preferred skills
IP/SoC design, logic synthesis, static timing analysis, floorplanning, AMBA protocols, low-power design (UPF), scripting (Python/Perl/TCL), pixel-centric design
Technologies
RTL, UPF, AMBA (AXI, AHB, APB), Python, Perl, TCL
Responsibilities
Write micro-architectural and integration specifications; Perform digital hardware design with RTL, assertions, and cover points; Optimize timing, area, and power with physical design teams; Ensure compliance with power, clock, and reset domain best practices; Collaborate with verification teams for debugging and validation; Manage deliverables to align with project goals
Seniority
Senior, hands-on IC
