PMU Design Verification Engineer: Analog & Mixed Signal Engineer
Core
Ensuring high quality silicon for IC chips and IPs by verifying mixed-signal IC designs using a combination of analog circuits and RTL in the same simulation.
Role type
Analog & Mixed Signal Verification Engineer
Builds
Production-quality first silicon for world-leading products
Domain
Semiconductor / Mixed-Signal IC Design
Required skills
Verilog, System-Verilog, Verilog-AMS, analog assertion checks, simulation optimization, test plan development, coverage collection, gate level simulations, power management circuitry knowledge (switching/linear converters, reference circuitry, bandgaps, data converters, clock generators), scripting (TCL, Skill, Python, PERL)
Preferred skills
Collaborative team environment, failure mechanism identification, test bench scalability, analog behavioral models
Technologies
Simulators, waveform viewers, execution automation, compute clusters
Responsibilities
Develop detailed test and coverage plans based on IC specifications; Complete verification plans from beginning to end including test bench bring-up, regressions, failure debug, and tape-out; Develop verification methodology suitable for the IP ensuring scalability and portability; Develop verification environment including stimuli, checkers, assertions, trackers, and coverage; Sign-off mixed signal designs in preparation for tapeout
Seniority
Mid-level, hands-on IC