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Graphics Power Analysis & Optimization Engineer

Santa Clara, United States of America💼 Full-time🗓 2026-04-13 → 2026-09-28

Core

Design and manufacture next-generation, high-performance, power-efficient processor and system-on-chip (SoC) for Apple devices.

Role type

Senior IC graphics power analysis and optimization engineer

Builds

High-performance GPU designs and SoCs for Apple products

Domain

Consumer electronics / Semiconductor / GPU architecture

Required skills

Low power microarchitecture, RTL power analysis, gate-level power analysis, Python scripting, PowerArtist, PTPX, GPU workload analysis, power optimization heuristics

Preferred skills

RTL design simulation and debugging, digital logic design principles, GPU pipeline knowledge

Technologies

PowerArtist, PTPX, Python

Responsibilities

Create early power estimation and perform what-if analysis at architectural evaluation; Support RTL and gate-level power rollup and analysis; Analyze GPU workloads to identify power reduction opportunities; Evaluate and implement power optimizations in RTL and gates; Identify power sign-off tests to improve analysis coverage; Develop flows and heuristics to accelerate power triage on large datasets

Seniority

Senior, hands-on IC

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